MIPS Open Program Speeds Next-Gen SoC Designs

Wave Computing launches the first release of its MIPS Open program components based on the company’s MIPS instruction set architecture (ISA) and recent architectural extensions. The goal is to accelerate adoption of the MIPS architecture by chip developers, ecosystem partners and academic communities. Under the MIPS Open program, participants have full access to the most recent version, R6, of the 32-and-64-bit MIPS architecture free of charge, with no licensing or royalty fees. 

 

The MIPS Open program release includes:

Embedded Technologies Expo & Conference

The inaugural event will take place June 25-27 in San Jose, CA!

Embedded Technologies Expo & Conference (ETC), in the largest embedded and IoT market in North America, is the ONLY event focused on what is most important to designers and implementers – education and training. Attendees will experience over 100 hours of unparalleled education and training covering embedded systems, IoT, connectivity, edge computing, AI, machine learning, and more. Co-located with Sensors Expo & Conference, attendees will have the opportunity to see hundreds of leading exhibitors and network with thousands of industry peers and innovators.
  • MIPS ISA – A downloadable copy of the latest R6 version of the MIPS 32-and-64-bit architecture, including extensions such as virtualization, multi-threading, SIMD, DSP and microMIPS code compression.
  • MIPS Open Tools – Integrated development environment for embedded real-time operating systems and Linux-based systems for embedded products that enable developers to build, debug and deploy applications on MIPS-based hardware and software platforms.
  • MIPS Open Field Programmable Gate Arrays (FPGAs).

 

A training program for members includes:

  • Getting Started Package – Provides the MIPS FPGA system as a set of Verilog files, plus an overview and instructions on how to use the MIPS FPGA system.
  • Labs – Includes 25 hands-on labs that help developers explore the MIPS architecture and system-level designs;
  • SoC Tutorials – Step-by-step direction on how to build a system-on-chip design based on the MIPS Open FPGA using an open source Linux operating system.
  • RTL Code for the MIPS microAptiv core – Sample (non-commercial) code enables developers to explore microarchitecture features.

 

Additions to the MIPS Open components are planned, including the release of the commercial RTL code for the MIPS microAptiv cores and new features for the development environment.  Wave also plans to host a series of MIPS Open Developer Days, wherein designers can meet face-to-face to exchange ideas, learn about new ISA features, and receive guidance on their designs.  For more information, visit MIPS Open components.

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