Memory Designer Shortens Design Cycles

Keysight Technologies’ PathWave Memory Designer double data rate (DDR) memory simulation capability that’s part of PathWave Advanced Design System (ADS) 2019 promises to make it easy for developers to compare simulated data with actual measured results, reducing the time required to complete product development workflows. PathWave ADS Memory Designer connects simulation and test workflows, addressing common DDR memory design challenges with new workflows that automate routine tasks and harness data analytics to gain faster actionable insight into simulation data.

 

PathWave features include:

EMBEDDED TECHNOLOGIES EXPO & CONFERENCE

The inaugural event will take place June 25-27 in San Jose, CA!

Embedded Technologies Expo & Conference (ETC), in the largest embedded and IoT market in North America, is the ONLY event focused on what is most important to designers and implementers – education and training. Attendees will experience over 100 hours of unparalleled education and training covering embedded systems, IoT, connectivity, edge computing, AI, machine learning, and more. Co-located with Sensors Expo & Conference, attendees will have the opportunity to see hundreds of leading exhibitors and network with thousands of industry peers and innovators.
  • Open APIs and open source components that enable customers to customize the platform and integrate with their current hardware and software
  • A scalable architecture that provides the flexibility to run computations on a dedicated workstation, in the public or private cloud, or on embedded instrument software
  • Flexible consumption models that let companies utilize software when and where they need it
  • Best-in-class measurement science that produces consistent, accurate results across design, test, and manufacturing environments.  

For more information, checkout the PathWave ADS product page. Also take a gander at the video below.

 

 

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