Quad/Dual 14-Bit 125 Msps ADCs from Linear
Linear Technology Corp.
August 26, 2009
Linear Technology Corp., Milpitas, CA, offers a family of 24 ultralow-power 14-/12-bit, 125–25 Msps, quad and dual simultaneous sampling ADCs. The LTC2175-14 quad, 14-bit 125 Msps ADC dissipates 558 mW and offers 73.4 dB SNR, 88 dB SFDR, and 1 mW power dissipation in sleep mode. Data are output in serial LVDS format. At 125 Msps, each channel outputs 2 bits at a time, using 2 lanes/ADC. At lower sample rates, a 1 bit/channel option is available. Other features includes an SPI-compatible interface, a data output randomizer, 7 programmable LVDS output current levels, and a 7 by 8 mm QFN package. Applications include high-speed multichannel designs such as MIMO WiMAX/LTE and 3G base stations, portable medical imaging, and NDT.
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