Optical Sensors

Battery-Powered Imaging Applications Require Unique Strategies

February 17, 2017 By: Ted Marena, Microsemi

Time-Lapse Camera

Another design example we can explore is a time-lapse camera, which captures slow changing content anywhere from once per second to once an hour or even once per day. It is a portable battery-powered device that must capture and store images in between powering-up and shutting-off quickly to preserve power. It can capture flowers growing, sunsets, and buildings being constructed. Because of the content they are capturing, time lapse cameras have to operate on batteries for periods up to several months.

In this design, the logical choice is an image sensor originally designed for a smartphone. On the other hand, the application sensor is not a great choice. Although application processors are low power when off, they consume lots of power when on. They also take indefinite time before going back to a very low-power mode, which drains the battery.

A better choice is a low-power FPGA that powers up instantly, has DSP blocks to implement the image processing, and can interface to CSI-2 for the image sensor interface. In addition, it would be more power efficient to use a low-end microcontroller to handle storing the images to external flash, as well as managing the USB interface when downloading to a PC. Therefore, the flash-based SmartFusion2 SoC FPGA is an excellent choice. It is low power, instant on, and incorporates a Cortex ARM M3 with a microcontroller subsystem that includes a USB OTG core. The SmartFusion2 also has built-in DSP blocks, adequate logic, embedded memory blocks and can interface directly to CSI-2 for the image sensor (figure 3).

Fig. 3:  Block Diagram of a Time Lapse Camera
Fig. 3: Block Diagram of a Time Lapse Camera

In this design, the FPGA interfaces to the image sensor and the image processing is done in the DSP blocks embedded memory as well as the FPGA fabric. The SmartFusion2 is on as soon as the camera powers up. Frames are captured and processed by the FPGA and stored to on-board flash. Once all tasks are complete, the camera and FPGA quickly power down.

Although most of the functions in this design could be done by a SRAM FPGA, the power consumption and initialization time required to start up—not to mention the spike of in-rush current that must be absorbed by the battery—makes SRAM technology less than ideal. The flash-based SmartFusion2 has very low static power and total power, which is ideal for this battery-powered design. And the icing on the cake; this device also incorporates a built-in Cortex ARM M3 and USB OTG controller that enables the stored images to be transferred to a PC for future editing or viewing.

Going Forward

The trend for portable products will likely continue to grow. The challenges that designers face when using only some of the components from the smartphone architecture can be addressed.

One solution is to leverage low power, flash-based FPGAs and flash-based SoC FPGAs. With these options available to system architects, numerous device combinations are possible to create an optimal portable product.

About the Author

Ted Marena is the director of FPGA/SOC marketing at Microsemi. He has over 20 years' experience in FPGAs. Previously Marena has held roles in design engineering, technical sales/support, business development, product & strategic marketing. He was awarded Innovator of the Year in February 2014 when he worked for Lattice Semiconductor. Ted holds a Bachelor of Science in electrical engineering Magna Cum Laude from the University of Connecticut and a MBA from Bentley College's Elkin B. McCallum Graduate School of Business.

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About the Author: Ted Marena

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