Electronics & Computers

Soitec and CEA-Leti To Join Forces on 3D Integration

December 2, 2009

The two entities' plans target a joint comprehensive industrial solution for wafer-level 3d integration; intent is to speed commercial adoption of the technology.

TOKYO, Japan -- The Soitec Group (Euronext, Paris), the world's leading supplier of engineered substrates for the microelectronics industry, and CEA-Leti, a leading global research center committed to creating and commercializing innovation in micro- and nanotechnologies, have announced plans to expand their collaboration on wafer-to-wafer 3D integration by offering customers a joint, comprehensive industrial solution. The global offer envisioned by the long-term partners begins with process customization for prototype demonstration and will include licensing, both in 200 mm and 300 mm.

3D-level integration allows stacking integrated circuits and connecting them vertically. The technology enables increased performance, smaller form factors, and reduced power consumption, while lowering the costs of next-generation electronic devices. Potential markets and applications include image sensors, logic on logic, memory on memory, sensors on logic, memory on logic and new heterogeneous solutions such as MEMS on logic and photonics on logic.

Soitec's contribution to the partnership includes its Smart Stacking technology, which enables wafer-to-wafer-level stacking of partially or fully processed circuits; its low-temperature Smart Cut process; and the copper-to-copper bonding technology already in development with CEA-Leti. This offer also leverages Soitec's core expertise in wafer bonding and thinning technologies as well as its unique industrial background in this field.

CEA-Leti, likewise, offers broad and deep 3D wafer-to-wafer technology and expertise. These include all the necessary process steps for different 3D approaches, such as connecting vias, and cost-effective technologies such as wafer pre-processing, bonding, thinning and TSV etching and filling, and post-processing wafer assembly.

"As the leaders in the building-block technologies that enable 3D integration at the wafer-to-wafer level, Soitec and Leti are uniquely positioned to offer customers a comprehensive solution," said André-Jacques Auberton-Hervé, Soitec president and CEO. "Leveraging Leti's 3D expertise and our well known bonding industrial experience, we can offer customers prototyping solutions as well as the processes they'll need for rapid ramp to full-scale production."

"We are proud to expand our partnership with Soitec and make the Grenoble Valley a center for 3D technology. This partnership will leverage CEA-Leti's extensive work in this area, including our 3D integration technology toolbox," said Laurent Malier, CEO of CEA-Leti. "Given CEA-Leti and Soitec's successful history of innovation, industrialization and collaboration, we expect our global offer to significantly advance commercial adoption of 3D integration technologies."

About CEA-Leti
CEA is a French Research and Technology Organization, with activities in three main areas: Energy, Technologies for Information and Healthcare, and Defence and Security. Within CEA, the Laboratory for Electronics & Information Technology (CEA-Leti) works with companies in order to increase their competitiveness through technological innovation and transfers. Leti is focused on micro and nanotechnologies and their applications, from wireless devices and systems, to biology and healthcare or photonics. Nanoelectronics and Microsystems (MEMS) are at the core of its activities. As a major player in the MINATEC excellence center, Leti operates 8,000-m2 state-of-the-art clean rooms, on 24/7 mode, on 200 mm and 300 mm wafer standards. With 1200 employees, Leti trains more than 150 Ph.D. students and hosts 200 assignees from partner companies. Strongly committed to the creation of value for the industry, Leti puts a strong emphasis on intellectual property and owns more than 1400 patent families. In 2008, contractual income covered more than 75 percent of its budget, which totalled 205 M€.

About the Soitec Group
The Soitec Group is the world's leading innovator and provider of the engineered substrate solutions that serve as the foundation for today's most advanced microelectronic products. The group leverages its proprietary Smart Cut technology to engineer new substrate solutions, such as silicon-on-insulator (SOI) wafers, which became the first high-volume application for this proprietary technology. Since then, SOI has emerged as the material platform of the future, enabling the production of higher performing, faster chips that consume less power.

Today, Soitec produces more than 80 percent of the world's SOI wafers. Headquartered in Bernin, France, with two high-volume fabs on-site, Soitec has offices throughout the United States, Japan and Taiwan, and a new production site in the process of customers' qualification in Singapore.

Two other divisions, Picogiga International and Tracit Technologies, complete the Soitec Group. Picogiga delivers advanced substrates solutions, including III-V epiwafers and gallium nitride (GaN) wafers, to the compound material world for the manufacture of high-frequency electronics and other optoelectronic devices. Tracit, on the other hand, provides thin-film layer transfer technologies used to manufacture advanced substrates for power ICs and microsystems, as well as generic circuit transfer technology Smart Stacking for applications such as image sensors and 3D-integration. Shares of the Soitec Group are listed on Euronext Paris.

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