Electronics & Computers

Lattice Partners with Aptina

April 5, 2011

The Lattice bridge reference design enables image signal processors with a traditional CMOS parallel bus to interface with Aptina high-speed serial pixel interface CMOS sensors.

HILLSBORO, OR /Marketwire/ -- Lattice Semiconductor Corp. announced full support for Aptina's high-speed serial pixel interface (HiSPi), using LatticeXP2 FPGAs. The LatticeXP2 HiSPi bridge reference design allows any image signal processor with a traditional CMOS parallel bus to interface with an Aptina HiSPi CMOS sensor. The HiSPi bridge solution is ideal for security cameras, automotive applications, high-end consumer cameras, and other camera applications where the use of higher-resolution and higher-frame-rate CMOS sensors is desirable.

"This is the second successful project we have worked on with Lattice, after the well-received HDR-60 video camera development kit, using an Aptina MT9M024 sensor. We are pleased to be working with Lattice again. This new LatticeXP2 FPGA-based HiSPi bridge chip is very useful to customers who want to adopt Aptina's high-resolution, high-performance image sensors," said Cliff Cheng, Aptina Senior Segment/Business Development Manager.

The free HiSPi bridge reference design supports all modes of the Aptina HiSPi specification and is available on Lattice's Web site. Users can download any of the common HiSPi interface designs or use the HiSPi configuration tool to generate a specific HiSPi bridge for their needs. The LatticeXP2 FPGA supports from one to four HiSPi data lanes, up to 700 Mpbs. HiSPi formats of Packetized-SP, Streaming-SP, Streaming-S, or ActiveStart-SP8 are supported. The HiSPi bridge is also designed to provide support for sensors in linear or HDR mode. The parallel bus interface to the ISP is configurable from 10 to 16 bits and the voltage level can be set from 1.8 to 3.3 V.

"We believe customers will find this a compelling design solution because the LatticeXP2 FPGA is a nonvolatile, single-chip, low-power device, available in a small 8 mm by 8 mm package, and offered in commercial, industrial, and AECQ-100-Qualified automotive temperature grades," said Ted Marena, Director of Business Development for Lattice. "This sensor bridge further demonstrates Lattice's commitment to partner with CMOS sensor and ISP vendors in camera, imaging, and video applications."

About the LatticeXP2 FPGA Family
The LatticeXP2 family combines a Look-up Table (LUT)–based FPGA fabric with Flash nonvolatile cells, providing the "industry's smallest form factor nonvolatile SRAM-based FPGAs." The flexiFLASH approach provides benefits such as instant-on operation, a small footprint, on-chip storage with embedded block memories, serial TAG memory, and the "highest design security." LatticeXP2 devices also support live updates with Lattice's unique TransFR technology, 128-bit AES design encryption, and dual-boot technologies. The family includes five devices, ranging between 5K and 40K LUTs, in a wide variety of packages. All LatticeXP2 FPGAs are fully production qualified and have been shipping for three years.

About Aptina
Aptina Imaging Corp. is a global provider of CMOS imaging solutions, with a growing portfolio of products that can be found in all leading mobile phone and notebook computer brands, as well as a wide range of products for digital and video cameras, surveillance, medical, automotive, and industrial applications, video conferencing, barcode scanners, toys, and gaming. Aptina enables Imaging Everywhere and continually drives innovation in the market, as seen with the introduction of the "first 14MP CMOS image sensor for point-and-shoot and hybrid cameras (MT9F001), and the industry's first 5MP SOC with 1/4-inch format (MT9P111)." Privately held, Aptina's investors include Riverwood Capital, TPG Capital, and Micron Technology. For additional information on Aptina, subscribe to the latest news from Aptina by copying the Aptina RSS feed into your favorite RSS reader.

About Lattice
Lattice Semiconductor Corp. is the source for innovative FPGA, PLD, programmable power management, and clock management solutions. Follow Lattice via Facebook, RSS, and Twitter.

Lattice Semiconductor Corporation, Lattice (& design), L (& design), LatticeXP2, flexiFLASH, TransFR, and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the U.S. and/or other countries.

Aptina, the Aptina logo, DR-Pix, and Imaging Everywhere are trademarks of Aptina Imaging Corp.

Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.

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